The present invention relates to an active matrix type display device, and, more particularly, to a multiple gray scale display device having a pixel memory system, which exhibits high numerical aperture and high definition.
As display devices for notebook type computers or display monitors, which are capable of performing color display with high definition, display devices using various display methods, including a display device which uses a liquid crystal panel, or a display device which uses electroluminescence (particularly organic EL), have been introduced or have been studied for practical use. Liquid crystal display devices are the most popularly used display devices these days. Here, as a typical example of such a display device, a so-called active matrix type liquid crystal display device.
In a thin film transistor (hereinafter referred to as TFT) type liquid crystal display device, which constitutes a typical example of an active matrix type liquid crystal display device, in which a TFT is provided for every pixel to serve as a switching element, a signal voltage (video signal voltage: gray scale voltage) is applied to a pixel electrode, and, hence, there is no crosstalk between pixels, so that a multiple gray scale display of high definition can be realized.
On the other hand, when this type of liquid crystal display device is mounted on an electronic device which uses a battery as a power source, such a portable information terminal or the like, it is necessary to reduce the power consumption incurred by the display. Accordingly, so far, there have been a large number of proposals with respect to ways to provide a memory function to each pixel of the liquid crystal display device.
FIG. 11 is a schematic diagram showing an example of a liquid crystal panel in the form of a low-temperature polysilicon TFT system liquid crystal display device, which incorporates a static R1\N (hereinafter referred to as an SRAM) of I bit in each pixel. The liquid crystal panel is constituted by sandwiching liquid crystal material between a first substrate and a second substrate, which face each other in an opposed manner. In the drawing, reference symbol PNL indicates a liquid crystal panel. The liquid crystal panel PNL includes a pixel portion (display region) AR, which occupies a major portion of the panel area, and a vertical scanning circuit GDR and a horizontal scanning circuit DDR, which are arranged at the periphery of the pixel portion AR on the first substrate. Each pixel of the pixel portion AR includes an image memory (SRAM) of 1 bit. Here, the liquid crystal panel PNL shown in FIG. 11 incorporates a digital-analogue converting circuit (DAC) of about 4 bits in the horizontal scanning circuit DDR thereof, and this digital-analogue converting circuit (DAC) is not an indispensable element.
FIG. 12 is a circuit diagram of the 1 bit SRAM image memory shown in FIG. 11. In the drawing, symbol GL indicates a gate line (scanning line), symbol DL indicates a drain line (signal line), symbol LC indicates liquid crystal, and VCOM indicates a common voltage. Reference symbol PIX indicates a pixel (unit pixel). The pixel PIX has a usual sampling function of supplying a gray scale analogue voltage of 4 bits to 6 bits from the outside to an electrode for driving the liquid crystal as it is, and an image memory function of temporarily storing the external 1 bit data to the SRAM and of outputting alternating voltages φp, φn corresponding to the 1 bit data to the electrode for the driving liquid crystal.
The selection between the sampling function and the image memory function is controlled from the outside. Here, the alternating voltages φp, φn are AC signals which are in synchronism with the liquid crystal alternating voltage cycle and alternate with polarities opposite to each other, wherein the alternating voltage φn is expressed by an inverted waveform of the alternating voltage φp. By adopting such a pixel constitution, it is possible to display 1 bit data stored in the SRAM at a standby time of a mobile telephone, for example, and, hence, the power consumption necessary for writing data can be reduced.